Information Security - MITSUBISHI ELECTRIC

Camellia is a symmetric-key encryption algorithm jointly developed in 2000 by Mitsubishi Electric and NTT. It combines Mitsubishi Electric’s encryption design know-how for optimally compact, high-speed hardware processing; NTT’s encryption design know-how for optimal hardware software implementation; and both company’s world-leading standards for optimally secure encryption evaluation technology. Cammelia’s design makes deciphering it virtually impossible using either differential cryptanalysis or linear cryptanalysis. Camellia, moreover, is safe against such other leading encryption technology as related-key attacks, truncated differential cryptanalysis, and slide attacks.

News release (2000-03-10)
Camellia website by NTT

The results of Camellia’s hardware implementation evaluation are as follows:

Implementation Evaluation Environment

	Development language: Verilog-HDL
	Simulator: Verilog-XL
	ASIC (Design library): Mitsubishi Electric 0.18ìm CMOS ASIC library (Logic synthesis and function evaluation): Design compiler version 2000.11-SP1
	FPGA (Target FPGA): Xilinx Virtex1000E series (Logic synthesis): Synplify version 6.2.4 (Function evaluation): Alliance version 3.3.08i

(1) ASIC Evaluation Result (No pipeline implementation)

	Throughput priority Throughput: 3,200.0 [Mbps] Area size: 355.1 [Kgate] Throu./area: 9.0 [Kbps/gate] Latency: 1 [Cycles]
	Area priority Throughput: 71.6 [Mbps] Area size: 6.37 [Kgate] Throu./area: 11.2 [Kbps/gate] Latency: 40 [Cycles]
	Throughput/area priority Throughput: 1,051.0 [Mbps] Area size: 11.9 [Kgate] Throu./area: 88.5 [Kbps/gate] Latency: 21 [Cycles]

(2) FPGA Evaluation Result (No pipeline implementation)

	Throughput priority Throughput: 223.7 [Mbps] Area size: 1,678 [Slice] Throu./area: 133.3 [Kbps/slice] Latency: 21 [Cycles]
	Area priority Throughput: 79.7 [Mbps] Area size: 1,124 [Slice] Throu./area: 70.9 [Kbps/slice] Latency: 40 [Cycles]
	Throughput/area priority Throughput: 223.7 [Mbps] Area size: 1,678 [Slice] Throu./area: 133.3 [Kbps/slice] Latency: 21 [cycles]

	Camellia’s encryption speed is as shown below. The results are based on measurements for 128-bit keys. Platform: Pentium III (1G MHz) Language: JAVA Key schedule: 9,091 cycles/key Cryptography: 793 cycles/block Key schedule (Bit slice implementation): 46 cycles/key Cryptography (Bit slice implementation): 169 cycles/block Platform: Pentium III (650 MHz) Language: Assembler Key schedule: 141 cycles/key Cryptography: 326 cycles/block Platform: M32Rx/D Language: Assembler Key schedule: 642 cycles/key Cryptography: 1,236 cycles/block ROM size: 8,684 bytes RAM size: 44 bytes Platform: H8/3113 Language: Assembler Key schedule: 2,380 cycles/key Cryptography: 4,100 cycles/block RAM size: 208 bytes Platform: Z80 Language: Assembler Key schedule: 5,146 cycles/key Cryptography: 28,382 cycles/block ROM size: 1,698 bytes RAM size: 62 bytes