Start-up of mass production of eRAM/SI with 0.35 micron HyperDRAM II library

Tokyo, September 25, 1997 -- Mitsubishi Electric Corporation (President: Takashi Kitaoka) announced that the company will commerce mass production of "eRAM SI (System Integration)", a hybrid custom LSI chip with built-in DRAM/micro-controller logic circuit, beginning on October 1, 1997. This is the third issue in the company's eRAM series, following the "3D-RAM" and "M32R/D."

Product Outline

The eRAM/SI uses the library developed through Mitsubishi Electric's proprietary 0.35 micron HyperDRAM II processes. This technology means that an extensive ASIC library, DRAM core, 16-bit CPU core, and a powerful 32bit CPU core can now coexist on a single chip. Customers will be provided with high-speed, low power consumption LSI chips for multimedia applications designed according to their own specifications using this extensive library.

Development Background

PDAs, digital cameras, digital TVs, DVDs, graphic accelerators, and other multimedia equipment need the capacity to handle large volumes of data. They require a high-capacity memory and high-speed logic circuits for optimum performance. In other words, both memory and logic circuits must be optimized to achieve high-performance multimedia systems. Mitsubishi Electric went to work to address this problem and became the first company in the industry to successfully develop eRAM (embedded RAM) technology incorporating high-capacity memory and logic circuits on a single chip. Mitsubishi Electric has been marketing products based on this process since 1995. Widely available ASSP (Application Specific Standard Products) based on the eRAM technology include M32R/D, a 32-bit RISC processor with DRAM, as well as 3D-RAM, a high-performance three-dimensional video processor memory. The eRAM/SI, another variant of Mitsubishi's eRAM chips is intended to meet ever-diversifying market needs for ASCP (Application Specific Customs Products).

Product Features

(1) High-speed, low power consumption, and smaller size

With DRAM and logic circuits on a single chip, internal bus width can be increased because the chip construction is unaffected by the limited number of external pins. The minimal amount of stray capacitance associated with signal lines inside the chip and lower power consumption mean that a higher clock speed can be achieved with ease. The combination of these positive effects means a remarkable improvement in the data transfer rate. More specifically, the data processing capacity per unit of power consumption is increased by 5 to 50 times compared with conventional products. Moreover, the number of parts on the circuit board has also been reduced, decreasing chip size significantly.

(2) Large 16M-bit DRAM core on chip

A high-capacity DRAM, not available with any conventional LSI chip, can be incorporated on the chip to meet the minimum DRAM requirement. DRAM capacity may be adjusted in 1M-bit increments, and the chip area occupied by DRAM can be minimized by installing the optimal amount of DRAM.

(3) HyperDRAM process

Mitsubishi Electric's new hybrid LSI series uses HyperDRAM process technology, an enhanced high-integration DRAM process technology allowing high-speed logic operation and high-density circuits.

Product Specifications

- Technology: 0.35 micron HD II process

-- 3-layer aluminum and 4-layer polysilicon circuit board

-- Triple-well structure*

- Maximum number of logic circuits on chip: 500K gates

- EDO-DRAM core

--Maximum memory capacity on chip: 1-16M bits (adjustable in 1M-bit increments)

--Bus width: 64-bit, 128-bit

--Access time: 70ns

- Ultra-high-speed gate: 168ps (fan out = 2)

- Low power consumption: 0.9 mw/MHz (fan out = 1, x1 drive cell)

* Triple-well structure is adopted to electrically separate DRAM and logic circuit sections to minimize mutual interference.

Major Applications

This innovative technology for integrating DRAM, micro-controller, and ASIC on a single chip will be used for the following four application categories.

-High-performance electronic equipment market: graphics, network computing applications

-PC peripheral market: printers, HDDs

-Multimedia communication terminal market: PDAs, Internet phones

-Multimedia audio-visual equipment market: DVDs, WebTVs

Future Developments

Mitsubishi Electric will begin further business promotions upon the introduction in March 1998 of the 32-bit RISC core M32R/I, the latest addition to the company's HyperDRAM II-based product line. The 0.3 micron and 0.25 micron HyperDRAM library for the next-generation 64 Mbit DRAM is scheduled to be released in 1998. The 0.18 micron HyperDRAM library for the 256 Mbit DRAM is currently under development.

For product catalogs and documentation, please contact:

Shinichi Kojima
Manager
Overseas Group
Semiconductor Marketing Planning Dept.
Mitsubishi Electric Corporation
2-2-3, Marunouchi
Chiyoda-ku, Tokyo 100
Phone: (03) 3218-3440
Fax: (03) 3218-2722 (03) 3218-2894